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 74AUP1G04
Low power single inverter gate
Features

High speed: tPD = 4.3 ns (max.) at VCC = 2.3 V Power down protection on inputs and outputs Balanced propagation delays: tPLH tPHL Operating voltage range: VCC (opr) = 1.2 to 3.6 V Low power dissipation: ICC = 1 A (max.) at TA = 85 C Latch-up performance exceeds 300 mA (JESD 78, Class II) ESD performance: - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101)
SOT-665 DFN6L
Applications

Mobile phones Personal digital assistants (PDAs)
Description
The 74AUP1G04 is a low voltage CMOS single inverter gate fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for 1.2 to 3.6 V operations and low power and low noise applications. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2kV ESD immunity and transient excess voltage.
Table 1.
Device summary
Order code 74AUPG04DTR 74AUPG04GTR Package DFN6L (1.2 x 1 mm) SOT-665 (1.6 x 1.6 mm) Packing Tape and reel Tape and reel
March 2008
Rev 1
1/18
www.st.com 18
Pin settings
74AUP1G04
1
1.1
Pin settings
Pin connection
Figure 1. Pin connection (top through view)
NC A GND
1 2 3
6 5 4
VCC NC B
NC A GND
1 2 3
5
VCC
4
B
DFN6L
SOT-665
CS00092
1.2
Pin description
Table 2.
DFN pin number 1 2 3 4 5 6
Pin assignment
SOT pin number 1 2 3 4 5 Symbol NC A GND B NC VCC Not connected Data input Ground (0V) Data output Not connected Positive supply voltage Name and function
2/18
74AUP1G04
Pin settings
1.3
Truth table
Figure 2. Truth table
A
B
Table 3.
Truth table
A L H B H L
Figure 3.
Input and output equivalent circuit
V CC
Overvoltage control Input Output
ESD protection
ESD protection
GND
GND
GND
GND
GND
CS08974
3/18
Maximum rating
74AUP1G04
2
Maximum rating
Stressing the device above the rating listed in the "absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4.
Symbol VCC VI VO VO IIK IOK IO ICC IGND PD Tstg TL Supply voltage DC input voltage DC output voltage (VCC = 0 V) DC output voltage (high or low state) DC input diode current DC output diode current DC output current DC supply current per supply pin DC ground current per supply pin Power dissipation Storage temperature Lead temperature (10 sec)
Absolute maximum ratings
Parameter Value -0.5 to +4.6 -0.5 to +4.6 -0.5 to +4.6 -0.5 to VCC + 0.5 -20 -50 50 100 100 200 -65 to +150 260 Unit V V V V mA mA mA mA mA mW C C
2.1
Recommended operating conditions
Table 5.
Symbol VCC VI VO Top Supply voltage Input voltage Output voltage Operating temperature VCC = 3.0 to 3.6 V dt/dv Input rise and fall time VCC = 2.3 to 2.7 V VCC = 1.2 to 1.95 V
Recommended operating conditions
Parameter Value 1.2 to 3.6 0 to VCC 0 to VCC -40 to 85 10 20 100 Unit V V V C ns/V ns/V ns/V
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74AUP1G04
Electrical characteristics
3
Table 6.
Electrical characteristics
DC specifications
Value Value -40 to 85 C Max Min 0.65 VCC 1.6 2.0 0.35 VCC 0.7 0.8 IOH = -100 A IOH = -10 mA IOH = -6 mA IOH = -4 mA IOH = -2 mA IOH = -1 mA IO = 100 A IO = 10 mA IO = 6 mA IO = 4 mA IO = 2 mA IO = 1 mA VI = GND to 3.6 VI or VO = 0 to 3.6 V VI = VCC or GND VI = VCC - 0.6V, IO = 0 VCC - 0.2 2.45 1.85 1.30 1.10 1.00 0.15 0.50 0.35 0.35 0.25 0.20 0.1 0.1 0.1 80 VCC - 0.2 2.4 1.8 1.25 1.05 0.95 0.20 0.55 0.40 V 0.40 0.30 0.25 0.5 1.0 1 100 A A A A V 0.35VCC 0.7 0.8 V V Max Unit VCC (V)
Symbol
Parameter
Test condition Min
25 C
1.2 to 1.95 VIH High level input voltage 2.0 to 2.7 2.75 to 3.6 1.2 to 1.95 VIL Low level input voltage 2.0 to 2.7 2.75 to 3.6 1.2 to 3.6 3.0 VOH High level output voltage 2.3 1.65 1.4 1.2 1.2 to 3.6 3.0 VOL Low level output voltage 2.3 1.65 1.4 1.2 II Ioff ICC Input leakage current Power off leakage current Quiescent supply current ICC increment per input 0 to 3.6 0 1.2 to 3.6 3.3
0.65 VCC 1.6 2.0
ICC
5/18
Electrical characteristics Table 7. AC electrical characteristics
Test condition Symbol Parameter VCC (V) CL (pF) Typ 1.1 to 1.3 1.4 to 1.6 1.65 to 1.95 2.3 to 2.7 3.0 to 3.6 1.1 to 1.3 1.4 to 1.6 1.65 to 1.95 2.3 to 2.7 tPLH, tPHL Propagation delay time 3.0 to 3.6 1.1 to 1.3 1.4 to 1.6 1.65 to 1.95 2.3 to 2.7 3.0 to 3.6 1.1 to 1.3 1.4 to 1.6 1.65 to 1.95 2.3 to 2.7 3.0 to 3.6 30 15 10 5 8.0 4.2 3.2 2.3 1.9 8.6 4.6 3.5 2.4 2.0 9.1 5.6 3.8 2.6 2.2 10.5 5.5 4.3 3.1 2.7 Min Max 12.4 6.6 5.1 3.1 2.5 13 7 5.3 3.5 2.9 25 C Value -40 to 85 C
74AUP1G04
Unit
ns 13.3 7.5 5.7 3.7 3.1 16 9 6.7 4.3 3.8
Table 8.
Capacitive characteristics
Value VCC (V) Test condition Min 0
Symbol
Parameter
TA = 25 C Typ 3 Max
Unit
CI CO CPD
Input capacitance 3.6 Output capacitance Power dissipation capacitance 3.6 3.6
VI = 0 or VCC VI = 0 or VCC VI = 0 or VCC f = 10 MHz
pF 6 6 32 pF pF
6/18
74AUP1G04
Test circuit
4
Test circuit
Figure 4. Test circuit
Open
Pulse generator
DUT
SC11691
Table 9.
Test setting
Test Switch Open
tPLH, tPHL
Table 10.
Symbol
Symbol and values for test circuit and waveform
VCC 1.2 0.1 V 1.5 0.1 V 1.8 0.15 V 2.5 0.2 V 3.3 0.3 V
CL RL VM VIH tr = tf
5, 10, 15, 30 pF 5, 10, 15, 30 pF 500 VCC/2 VCC 2 ns 500 VCC/2 VCC 2 ns
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 500 VCC/2 VCC 2 ns 500 VCC/2 VCC 2 ns 500 1.5 VCC 2 ns
RT = ZOUT of pulse generator (typically 50 )
7/18
Test circuit Figure 5. Waveform: propagation delay (f = 1 MHz; 50% duty cycle)
74AUP1G04
tr
tf VIH VM tPLH tPHL GND VOH
90% A VM 10%
B
VM
VM VOL
8/18
74AUP1G04
Package mechanical data
5
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 6. DFN6L (1.2 x 1 mm) package outline
7899067
9/18
Package mechanical data
74AUP1G04
Table 11.
DFN6L (1.2 x 1 mm) package mechanical data
Millimeters
Symbol Typ A A1 A3 b D E e L L1 0.50 0.02 0.127 0.20 1.20 1 0.40 0.35 0.45 0.30 0.40 0.40 0.50 0.15 1.15 0.95 0.25 1.25 1.05 Min 0.45 0 Max 0.55 0.05
Figure 7.
DFN6L (1.2 x 1 mm) package footprint
10/18
74AUP1G04 Figure 8. SOT-665 (1.6 x 1.6 mm) package outline
Package mechanical data
bp D E
A Lp He C
e1 e
Table 12.
SOT665 (1.6 x 1.6 mm) mechanical data
Millimeters Typ A Min 0.50 0.17 0.08 1.5 1.1 1 0.5 1.5 0.1 1.7 0.3 Max 0.60 0.27 0.18 1.7 1.3
Symbol
bp c D E e e1 He Lp
11/18
Package mechanical data Figure 9. SOT-665 (1.6 x 1.6 mm) package footprint
74AUP1G04
Figure 10. DFN6L (1.2 x 1 mm) carrier tape information
7875978
12/18
74AUP1G04
Package mechanical data Figure 11. DFN6L (1.2 x 1 mm) reel information drawing (back view)
13/18
Package mechanical data Figure 12. DFN6L (1.2 x 1 mm) reel information drawing (front view)
74AUP1G04
14/18
74AUP1G04 Figure 13. SOT-665 (1.6 x 1.6 mm) carrier tape information
Package mechanical data
Figure 14. SOT-665 (1.6 x 1.6 mm) reel information
15/18
Package mechanical data Table 13.
Value(1) Min Typ Max
1. Millimeters.
74AUP1G04
SOT-665 (1.6 x 1.6 mm) reel description
R1 12.8 13 13.2 R2 175 180 185 R3 59.5 60 60.5 eint (at hub) 8.4 8.4 10 e1 1.5 W1 8.4 8.4 10 14.4 W2 W3 7.9 9.4 10.9
16/18
74AUP1G04
Revision history
6
Revision history
Table 14.
Date 28-Mar-2008
Document revision history
Revision 1 Initial release. Changes
17/18
74AUP1G04
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